{"id":1666,"date":"2026-10-05T12:00:00","date_gmt":"2026-10-05T04:00:00","guid":{"rendered":"https:\/\/www.jingpengpcb.com\/?p=1666"},"modified":"2026-10-05T13:27:14","modified_gmt":"2026-10-05T05:27:14","slug":"high-frequency-pcb-production","status":"publish","type":"post","link":"https:\/\/www.jingpengpcb.com\/en\/blog\/high-frequency-pcb-production\/","title":{"rendered":"High-Frequency PCB Manufacturing Requirements: A Guide to Materials, Layer Stacks, Processing, and Inspection"},"content":{"rendered":"<p>The key to high-frequency PCB manufacturing is translating the material parameters, transmission line structures, and RF specifications from the circuit design into requirements that the factory can manufacture, measure, and trace. Simply specifying \u201chigh-frequency board, 50\u03a9, immersion gold\u201d in an order is usually insufficient to determine the actual stackup, manufacturing tolerances, and acceptance criteria.<\/p>\n<blockquote style=\"margin:24px 0;padding:20px 24px;border-left:4px solid #165a91;background:#f2f6fa\">\n<p><strong>Before starting production, make sure to confirm the following four things:<\/strong>Operating frequency bands and performance targets; specific materials and finished laminates; manufacturing constraints for critical paths and vias; and test methods and acceptance criteria. Even if material part numbers are the same, this does not necessarily mean that the RF performance of different batches or different manufacturing processes will be identical.<\/p>\n<\/blockquote>\n<figure class=\"wp-block-image size-large\"><img src=\"https:\/\/www.jingpengpcb.com\/wp-content\/uploads\/2024\/05\/PCB-manufacture.jpg\" alt=\"A diagram of the PCB manufacturing process, intended to illustrate the process control steps in high-frequency board production\" width=\"2160\" height=\"1025\" loading=\"lazy\" decoding=\"async\" \/><\/figure>\n<h2>1. First, define the acceptance criteria for high-frequency boards<\/h2>\n<p>High-frequency design cannot be evaluated based on a single frequency threshold alone. Actual risks are also related to trace length, allowable loss, phase error, and structural dimensions; in high-speed digital circuits, signal edges and their spectra must also be taken into account. Short-distance RF interconnects and millimeter-wave array feedlines\u2014even though both are referred to as high-frequency PCBs\u2014require different design considerations.<\/p>\n<ul>\n<li><strong>Antennas and Feed Networks:<\/strong>Define the operating bandwidth, impedance matching, feedline phase consistency, and the solder mask and mechanical boundaries of the antenna area.<\/li>\n<li><strong>Filters and Couplers:<\/strong>Indicate the critical line width, coupling spacing, resonant structure dimensions, and allowable center frequency deviation.<\/li>\n<li><strong>RF Power Circuits:<\/strong>At the same time, evaluate changes in performance after accounting for power loss, heat generation, heat dissipation paths, and temperature rise.<\/li>\n<\/ul>\n<p>The drawings should distinguish between bare-board testing and system testing after assembly. Passing the bare-board electrical continuity test does not directly prove that the module meets requirements for gain, noise, matching, or antenna efficiency. For the product scope, please refer to<a href=\"\/en\/high-frequency-pcb\/\">High-Frequency PCB Manufacturing Page<\/a>\u3002<\/p>\n<h2>2. Material Selection: Don\u2019t just compare a single Dk value<\/h2>\n<h3>Clearly specify the test conditions and design parameters.<\/h3>\n<p>The dielectric constant (Dk) affects impedance and electrical length, while the loss factor (Df) is one of the parameters used to evaluate dielectric loss. When comparing materials, verify the test frequency, method, direction, and conditions; do not directly rank values obtained from different test systems. For materials that specify a \u201cDesign Dk,\u201d the design value should be selected based on the manufacturer\u2019s specifications and the actual transmission line model, rather than arbitrarily substituting values from the data sheet. See<a href=\"https:\/\/www.rogerscorp.com\/blog\/2018\/managing-pcb-materials-dielectric-constant-dk\" target=\"_blank\" rel=\"noopener noreferrer\">Rogers' Explanation of Dk and Design Dk<\/a>\u3002<\/p>\n<h3>Material Information to Be Locked for the Order<\/h3>\n<ul>\n<li>Manufacturer, complete model number, substrate thickness and tolerances, copper foil type, and original copper thickness.<\/li>\n<li>The model numbers of the bonding sheets or prepregs used for multilayer boards, as well as the target thickness of the laminate after pressing.<\/li>\n<li>Temperature conditions, moisture absorption conditions, thermal expansion, and thermal behavior requirements during assembly.<\/li>\n<li>Are substitute materials permitted? If so, who is responsible for confirming the stackup, impedance model, and scope of revalidation?<\/li>\n<\/ul>\n<p>High-frequency materials are not the same as PTFE. The processing windows for thermosetting high-frequency materials differ from those of PTFE-based materials. When selecting a material, consider<a href=\"\/en\/capabilities\/pcb-materials\/\">PCB Board Guide<\/a>\u548c<a href=\"\/en\/capabilities\/pcb-materials\/rogers\/\">Rogers Sheet Material Page<\/a>Please note: Brand names cannot be used in place of specific model numbers.<\/p>\n<h2>3. Layering and Routing: Controlling the final product's structure, not just designing line widths<\/h2>\n<p>Impedance evaluation should be based on the finished dielectric thickness, finished copper thickness, trace width, trace spacing, and reference plane. The models for microstrip lines, striplines, and ground-coupled coplanar waveguides differ; for coplanar structures, the gap between the signal line and the ground copper on both sides must also be controlled. After the factory performs etching compensation, it should be verified whether the critical RF dimensions still meet the original design intent.<\/p>\n<figure class=\"wp-block-table\">\n<table style=\"width:100%;border-collapse:collapse;table-layout:fixed;font-size:0.94em;line-height:1.65\">\n<thead>\n<tr>\n<th scope=\"col\" style=\"padding:12px;text-align:left;vertical-align:top;background:#edf3f8;border:1px solid #dbe3eb;overflow-wrap:anywhere\">Control Object<\/th>\n<th scope=\"col\" style=\"padding:12px;text-align:left;vertical-align:top;background:#edf3f8;border:1px solid #dbe3eb;overflow-wrap:anywhere\">The drawings must include explanations.<\/th>\n<th scope=\"col\" style=\"padding:12px;text-align:left;vertical-align:top;background:#edf3f8;border:1px solid #dbe3eb;overflow-wrap:anywhere\">Key Evaluation Criteria<\/th>\n<\/tr>\n<\/thead>\n<tbody>\n<tr>\n<td style=\"padding:12px;text-align:left;vertical-align:top;border:1px solid #dbe3eb;overflow-wrap:anywhere\">Controlled Impedance Lines<\/td>\n<td style=\"padding:12px;text-align:left;vertical-align:top;border:1px solid #dbe3eb;overflow-wrap:anywhere\">Strata, Network, Target Values, and Tolerances<\/td>\n<td style=\"padding:12px;text-align:left;vertical-align:top;border:1px solid #dbe3eb;overflow-wrap:anywhere\">Perform calculations using the finished laminate and define the test strip structure<\/td>\n<\/tr>\n<tr>\n<td style=\"padding:12px;text-align:left;vertical-align:top;border:1px solid #dbe3eb;overflow-wrap:anywhere\">Coupled and Resonant Structures<\/td>\n<td style=\"padding:12px;text-align:left;vertical-align:top;border:1px solid #dbe3eb;overflow-wrap:anywhere\">Critical dimensions, measurement locations, and whether compensation is possible<\/td>\n<td style=\"padding:12px;text-align:left;vertical-align:top;border:1px solid #dbe3eb;overflow-wrap:anywhere\">You can't apply the same line width rules to all dimensions.<\/td>\n<\/tr>\n<tr>\n<td style=\"padding:12px;text-align:left;vertical-align:top;border:1px solid #dbe3eb;overflow-wrap:anywhere\">Reference Plane<\/td>\n<td style=\"padding:12px;text-align:left;vertical-align:top;border:1px solid #dbe3eb;overflow-wrap:anywhere\">Return Paths, Window Openings, and Floor Transitions<\/td>\n<td style=\"padding:12px;text-align:left;vertical-align:top;border:1px solid #dbe3eb;overflow-wrap:anywhere\">Detect discontinuities across partitions, connectors, and layer transitions<\/td>\n<\/tr>\n<tr>\n<td style=\"padding:12px;text-align:left;vertical-align:top;border:1px solid #dbe3eb;overflow-wrap:anywhere\">Radiofrequency Superficial Layer<\/td>\n<td style=\"padding:12px;text-align:left;vertical-align:top;border:1px solid #dbe3eb;overflow-wrap:anywhere\">Solder Mask Coverage and Surface Treatment Scope<\/td>\n<td style=\"padding:12px;text-align:left;vertical-align:top;border:1px solid #dbe3eb;overflow-wrap:anywhere\">Ensure that the manufacturing status matches the simulation model<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<\/figure>\n<p><strong>There is no single line width tolerance that applies to all high-frequency PCBs.<\/strong>The \u00b10.0007 inches specified in the original text cannot be used as a universal acceptance criterion. Key dimensions, tolerances, measurement methods, and manufacturing feasibility should be determined based on performance sensitivity; excessively tight tolerances may also increase the risks associated with sorting, rework, and delivery times.<\/p>\n<h3>Corners, back-traces, and vias should be evaluated together<\/h3>\n<p>45\u00b0 trace routing, arcs, or chamfers can be used to improve local geometric continuity, but they are no substitute for electromagnetic analysis. Greater attention should be paid to whether the reference plane is continuous, whether there are abrupt changes in pad transitions, and whether the reflow path is clear when changing layers. Using surface-mount devices with short leads helps reduce some parasitic effects, but the package, pads, and connectors still need to be modeled together with the transmission lines.<\/p>\n<p>Through-holes are not prohibited on high-frequency boards. The choice between blind vias, back-drilled vias, or other via configurations depends on the operating frequency band, board thickness, unused hole sections, and simulation results. When using back drilling, the entry plane, termination layer, residual stubs, and safety distances from adjacent copper must be specified; simply noting \u201cuse back drilling\u201d in the remarks is insufficient.<\/p>\n<h2>4. Manufacturing Process: How to Control Drilling, Hole Metallization, and Laminating<\/h2>\n<h3>Drilling parameters must be matched to the material system.<\/h3>\n<p>Cutting tools, feed rate, spindle speed, lamination method, and tool life should be verified based on the specific material and hole diameter. Key inspection points include the condition of the hole walls, hole positioning, and the quality of subsequent plating; it is not sufficient to merely confirm that the hole has been drilled through. For PTFE-based materials, hole wall preparation must follow the specific process requirements of the corresponding manufacturer before proceeding to the metallization process.<a href=\"https:\/\/www.rogerscorp.com\/-\/media\/project\/rogerscorp\/documents\/advanced-electronics-solutions\/english\/fabrication-information\/fabrication-guidelines-ro3000-and-ro3200-series-high-frequency-circuit-materials.pdf\" target=\"_blank\" rel=\"noopener noreferrer\">RO3000\/RO3200 Machining Guide<\/a>The treatment recommendations provided here cannot be applied indiscriminately to all high-frequency materials.<\/p>\n<h3>Hybrid printed circuit boards must take into account both electrical design and mechanical compatibility.<\/h3>\n<p>When high-frequency core sheets are laminated with other materials, the bonding system, lamination cycle, resin flow, interlayer alignment, and warpage risk should be jointly verified. The process review should result in a clearly defined post-pressing laminate, not merely a list of materials to be procured. For systems such as RO4000 LoPro, manufacturers also require that pressing conditions be determined in accordance with the processing guidelines for the selected bonding material; see<a href=\"https:\/\/www.rogerscorp.com\/-\/media\/project\/rogerscorp\/documents\/advanced-electronics-solutions\/english\/fabrication-information\/fabrication-guidelines-ro4000-lopro-laminates.pdf\" target=\"_blank\" rel=\"noopener noreferrer\">RO4000 LoPro Processing Instructions<\/a>\u3002<\/p>\n<p>For the initial evaluation, the cross-section location and test items can be selected based on risk, focusing on the thickness of the finished substrate, the coating on the pore walls, and the interlayer structure. During mass production, records of material batches, engineering versions, and key process parameters should also be retained to help identify batch-to-batch variations.<\/p>\n<h2>5. Surface Treatment and Solder Mask: Solderability and RF performance must be considered simultaneously<\/h2>\n<p>Electroless nickel-in-gold (ENIG) has specific applications in assembly, but the nickel layer can increase conductor loss in certain high-frequency structures; therefore, ENIG should not be considered the solution with the lowest loss for all RF circuits. Copper foil roughness, surface treatment, and trace structure should be evaluated together. Solder mask coverage also alters the dielectric environment of the top-layer traces; therefore, whether to provide openings for antennas, coupling gaps, and RF traces should be clearly specified in the design.<\/p>\n<p>When selecting a component, you should comprehensively consider the frequency band, loss budget, solderability, and storage and assembly requirements; do not switch directly to unprotected bare copper simply to reduce losses. For related considerations, please refer to<a href=\"https:\/\/rogerscorp.com\/-\/media\/project\/rogerscorp\/documents\/articles\/english\/advanced-connectivity-solutions\/pcb-design-and-fabrication-concerns-for-millimeter-wave-circuits.pdf\" target=\"_blank\" rel=\"noopener noreferrer\">Rogers Millimeter-Wave Circuit Design and Manufacturing Articles<\/a>, for a comparison of specific processes, see<a href=\"\/en\/capabilities\/pcb-surface-finishes\/\">Guide to PCB Surface Treatment<\/a>\u3002<\/p>\n<h2>6. Test Categorization: Continuity, impedance, and RF tests are not interchangeable.<\/h2>\n<figure class=\"wp-block-table\">\n<table style=\"width:100%;border-collapse:collapse;table-layout:fixed;font-size:0.94em;line-height:1.65\">\n<thead>\n<tr>\n<th scope=\"col\" style=\"padding:12px;text-align:left;vertical-align:top;background:#edf3f8;border:1px solid #dbe3eb;overflow-wrap:anywhere\">Inspection Levels<\/th>\n<th scope=\"col\" style=\"padding:12px;text-align:left;vertical-align:top;background:#edf3f8;border:1px solid #dbe3eb;overflow-wrap:anywhere\">Main Questions Addressed<\/th>\n<th scope=\"col\" style=\"padding:12px;text-align:left;vertical-align:top;background:#edf3f8;border:1px solid #dbe3eb;overflow-wrap:anywhere\">Must be arranged in advance<\/th>\n<\/tr>\n<\/thead>\n<tbody>\n<tr>\n<td style=\"padding:12px;text-align:left;vertical-align:top;border:1px solid #dbe3eb;overflow-wrap:anywhere\">Appearance, Dimensions, and Electrical Switching<\/td>\n<td style=\"padding:12px;text-align:left;vertical-align:top;border:1px solid #dbe3eb;overflow-wrap:anywhere\">Do the traces, holes, and network comply with the manufacturing specifications?<\/td>\n<td style=\"padding:12px;text-align:left;vertical-align:top;border:1px solid #dbe3eb;overflow-wrap:anywhere\">Drawing Version, Inspection Items, and Criteria for Determination<\/td>\n<\/tr>\n<tr>\n<td style=\"padding:12px;text-align:left;vertical-align:top;border:1px solid #dbe3eb;overflow-wrap:anywhere\">Impedance Testing<\/td>\n<td style=\"padding:12px;text-align:left;vertical-align:top;border:1px solid #dbe3eb;overflow-wrap:anywhere\">Is the impedance of the specified structure within the agreed-upon range?<\/td>\n<td style=\"padding:12px;text-align:left;vertical-align:top;border:1px solid #dbe3eb;overflow-wrap:anywhere\">Test Strips, Categories, Target Values, Tolerances, and Reports<\/td>\n<\/tr>\n<tr>\n<td style=\"padding:12px;text-align:left;vertical-align:top;border:1px solid #dbe3eb;overflow-wrap:anywhere\">RF Testing<\/td>\n<td style=\"padding:12px;text-align:left;vertical-align:top;border:1px solid #dbe3eb;overflow-wrap:anywhere\">Do the matching, transmission, and phase within the target frequency band meet the specifications?<\/td>\n<td style=\"padding:12px;text-align:left;vertical-align:top;border:1px solid #dbe3eb;overflow-wrap:anywhere\">Test Configuration, Frequency Range, Calibration, Reference Plane, and Limits<\/td>\n<\/tr>\n<tr>\n<td style=\"padding:12px;text-align:left;vertical-align:top;border:1px solid #dbe3eb;overflow-wrap:anywhere\">Reliability Verification<\/td>\n<td style=\"padding:12px;text-align:left;vertical-align:top;border:1px solid #dbe3eb;overflow-wrap:anywhere\">Does it still meet the requirements after undergoing the specified environmental or thermal conditions?<\/td>\n<td style=\"padding:12px;text-align:left;vertical-align:top;border:1px solid #dbe3eb;overflow-wrap:anywhere\">Samples, Conditions, Before-and-After Comparison Items, and Acceptance Criteria<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<\/figure>\n<p>When a project requires S-parameter testing, you should first confirm whether the test object is a bare board test line, a dedicated test specimen, or an assembled module, and agree on the test fixture and de-embedding method. Effects caused by connectors and fixtures cannot be directly attributed to the board itself. Impedance strip results also cannot substitute for performance testing of filters, antennas, or complete RF chains.<\/p>\n<p>The notation for return loss and S11 should be clearly specified: for return loss expressed as a positive value, a larger number generally indicates less reflection; for S11 expressed in dB, a more negative value generally indicates less reflection. Avoid simply stating that \u201creturn loss is less than a certain value,\u201d as this can lead to conflicting acceptance criteria.<\/p>\n<h2>7. When a sample exhibits an anomaly, identify the cause based on the observed symptoms.<\/h2>\n<ul>\n<li><strong>Overall impedance shift:<\/strong>First, verify the thickness of the post-pressing substrate, the actual line width, and the copper thickness; then verify the model parameters and the test strip structure.<\/li>\n<li><strong>Excessive insertion loss:<\/strong>Verify that the materials, copper foil, and surface treatment conform to the design specifications, while eliminating the effects of connectors, fixtures, and mismatches.<\/li>\n<li><strong>Resonance frequency or phase shift:<\/strong>Review the critical length, coupling spacing, solder mask condition, and test environment; do not immediately conclude that \u201cMaterial Dk is nonconforming.\u201d<\/li>\n<li><strong>There are significant differences between batches:<\/strong>Establish repeatable measurement conditions by comparing material batches, engineering changes, actual layer measurements, and machining records.<\/li>\n<\/ul>\n<p>The above sequence is intended to guide the troubleshooting process; the root cause cannot be determined based solely on observed phenomena. It is recommended to retain records of test curves, test conditions, and physical cross-sections before deciding whether to adjust the design or manufacturing parameters.<\/p>\n<h2>8. Prepare this list of materials before sending out a request for quotation<\/h2>\n<ol>\n<li><strong>Manufacturing Information:<\/strong>Gerber files or agreed-upon data formats, drill files, board outlines, layer sequences, version numbers, and quantities.<\/li>\n<li><strong>Materials and Layers:<\/strong>Complete information on material grades, copper foil, finished product thickness, bonding materials, and substitution policies.<\/li>\n<li><strong>RF Constraints:<\/strong>Operating frequency band, critical networks, impedance targets, critical dimensions, and permissible adjustment ranges.<\/li>\n<li><strong>Process Notes:<\/strong>Hole patterns, back drilling, solder mask openings, surface treatment, panel layout, and assembly requirements.<\/li>\n<li><strong>Acceptance and Delivery:<\/strong>Required reports, test specimens, sampling plans, RF testing responsibilities, and target delivery dates.<\/li>\n<\/ol>\n<p>If the information is incomplete, you may first submit the design documents and application notes to<a href=\"\/en\/free-dfm-dfa\/\">DFM (Design for Manufacturability) Review<\/a>. The specific materials, manufacturing capabilities, testing procedures, and delivery times for Shenzhen Jingpeng Electronics shall be subject to the results of the engineering review and order confirmation.<\/p>\n<h2>Frequently Asked Questions<\/h2>\n<h3>Is FR-4 definitely not suitable for high-frequency circuits?<\/h3>\n<p>One cannot make such a blanket statement. The determination should be based on a combination of frequency band, transmission length, allowable loss, and batch consistency. For performance-sensitive circuits, verification should be conducted using data appropriate for the model and actual prototypes; one cannot rely solely on the broad category designation \u201cFR-4\u201d to determine whether requirements are met.<\/p>\n<h3>If I switch to another material with the same Dk, do I need to reconfirm it?<\/h3>\n<p>Yes. It is also necessary to compare the Df, test methods, thickness, copper foil, thermomechanical properties, and processing systems, and to reconfirm the laminate structure and validation scope. A matching nominal Dk value does not imply direct interchangeability.<\/p>\n<h3>Why do the RF performance specifications still not meet the requirements even though the impedance test passed?<\/h3>\n<p>This is because impedance is only one part of the acceptance testing. Loss, local transitions, phase, connectors, and assembly conditions can all affect the final performance, so the entire link must be tested within the specified frequency range and relative to a reference plane.<\/p>\n<h3>What are the main factors affecting the cost and lead time of high-frequency circuit boards?<\/h3>\n<p>The key factors to consider include material supply, utilization rates, the number of lamination and pressing cycles, special pore structures, critical tolerances, and testing and reporting requirements. Completing the lamination and manufacturability verification first helps minimize iterative changes after production begins.<\/p>\n<h2>Submit a Request for High-Frequency PCBs<\/h2>\n<p>Once you have determined the material type, number of layers, board thickness, operating frequency, and impedance requirements, you can proceed via<a href=\"\/en\/quote\/\">Online PCB Quotes<\/a>Submit project documentation. If the materials or laminate configuration have not yet been determined, please indicate that these items are pending review so that manufacturing recommendations can be confirmed in conjunction with the design verification scope.<\/p>","protected":false},"excerpt":{"rendered":"<p>\u4ece\u6750\u6599\u578b\u53f7\u4e0eDk\u3001\u6210\u54c1\u53e0\u5c42\u3001\u94bb\u5b54\u538b\u5408\u5230\u8868\u9762\u5904\u7406\u548c\u5c04\u9891\u6d4b\u8bd5\uff0c\u68b3\u7406\u9ad8\u9891PCB\u6295\u4ea7\u8981\u6c42\uff0c\u7ea0\u6b63\u5e38\u89c1\u9009\u578b\u8bef\u533a\uff0c\u5e76\u63d0\u4f9b\u8be2\u4ef7\u8d44\u6599\u6e05\u5355\u3002<\/p>","protected":false},"author":1,"featured_media":9020,"comment_status":"closed","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"slim_seo":{"title":"What are the specific requirements for manufacturing high-frequency PCBs? - Jingpeng Electronics","description":"What are the specific requirements for high-frequency PCB manufacturing? We\u2019ll explain each one in detail, from corner radii, high-performance dielectrics, high-precision etching, SMD component selection, via treatment, to ground plane design."},"_slim_seo_primary_term_category":0,"_slim_seo_primary_term_post_tag":0,"footnotes":""},"categories":[406,26],"tags":[],"class_list":["post-1666","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-pcb-manufacturing","category-blog"],"_links":{"self":[{"href":"https:\/\/www.jingpengpcb.com\/en\/wp-json\/wp\/v2\/posts\/1666","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/www.jingpengpcb.com\/en\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/www.jingpengpcb.com\/en\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/www.jingpengpcb.com\/en\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/www.jingpengpcb.com\/en\/wp-json\/wp\/v2\/comments?post=1666"}],"version-history":[{"count":4,"href":"https:\/\/www.jingpengpcb.com\/en\/wp-json\/wp\/v2\/posts\/1666\/revisions"}],"predecessor-version":[{"id":19830,"href":"https:\/\/www.jingpengpcb.com\/en\/wp-json\/wp\/v2\/posts\/1666\/revisions\/19830"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/www.jingpengpcb.com\/en\/wp-json\/wp\/v2\/media\/9020"}],"wp:attachment":[{"href":"https:\/\/www.jingpengpcb.com\/en\/wp-json\/wp\/v2\/media?parent=1666"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/www.jingpengpcb.com\/en\/wp-json\/wp\/v2\/categories?post=1666"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/www.jingpengpcb.com\/en\/wp-json\/wp\/v2\/tags?post=1666"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}